Keysight Physical Layer Test System (PLTS) 2024 U1

Physical Layer Test System (PLTS) 2024 U1 is the industry standard for signal integrity measurements and data post‑processing high-speed interconnects, such as cables, backplanes, PCBs, and connectors.

What’s New with PLTS 2024

PCB Material Characterization Software Module

Now calculate surface roughness (Rz) with PLTS N19308B option
High speed digital design challenges have become overwhelming due the signal loss as data transmits through ultra-fast PC boards. When so-called identical PCBs show different electrical performance, the problem can often be traced back to the fundamental PCB material properties themselves (namely copper surface loss and Dk/Df). By utilizing the new PLTS 2024 PCB Material Measurement software, signal integrity engineers can now extract valuable insights into the dielectric material properties. The bottom line is this: higher copper roughness impedes current flow and results in higher insertion loss. Material problems can now be uncovered by extracting this critical parameter from your board designs.

Delta-L (1L/2L/3L) methods of calculating insertion loss/inch
Advanced de-embedding tools such as Keysight’s Automatic Fixture Removal (AFR) can achieve extracted models with unsurpassed accuracy. However, if a more simple de-embedding tool is desired, then Intel’s Delta-L methodology can be easily used. As more PCB manufacturers integrate high-speed Tx/Rx chipsets onto their boards, the need to measure and control frequency-based losses increases. Measuring transmission line losses presents fabricators with a set of challenges very different from those for validating impedance. The Delta-L 1-line, 2-line and 3-line methodologies now included within the PLTS 2024 release is one of the industry standards utilized for simple and fast confirmation of printed circuit board performance at today’s higher data rates.

Import FlexDCA eye mask for NRZ and PAM4
The Keysight Digital Communication Analyzer (DCA) oscilloscope has a large FlexDCA library of eye diagram masks that can now be easily leveraged and imported into PLTS 2024 eye diagram testing. Importing both NRZ and PAM4 eye masks can save precious time and money during the design validation cycle. Signal integrity engineers can now focus on more critical design challenges using this new feature.

The Physical Layer Test System (PLTS) is the industry standard for signal integrity measurements and data post processing of high-speed interconnects such as cables, backplanes, PCBs and connectors. Many signal integrity laboratories around the world have benefited from the power of PLTS in the R&D prototype test phase. Today’s 1.6 Tbps internet infrastructure demands multiport channel analysis to mitigate crosstalk issues that can cause bit errors. The new PLTS 2024 has now migrated to a powerful 64-bit application that enables deeper memory for large data files and achieves 16- or 32-port S-parameter measurements.

This demonstration shows you how to measure 32 interconnect devices using a PXI VNA with PLTS software for multi-port multi-domain device characterization. This is a cost effective solution that provides insight into channel performance.

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