NI LabVIEW 2018 FPGA Module with Compile Farm Toolkit

NI LabVIEW 2018 FPGA Module with Compile Farm Toolkit. With module, you can create VIs that run on NI FPGA targets, such as Reconfigurable I/O (RIO) devices. The FPGA Module helps you design complex systems by providing a highly-integrated development environment, a large ecosystem of IP libraries, a high-fidelity simulator, and debugging features. The FPGA Module also includes FPGA IP Builder and the FPGA Compile Farm Server. You can use FPGA IP Builder to efficiently implement your LabVIEW algorithms for FPGA targets and to generate FPGA code that meets specific performance requirements. FPGA IP Builder supports only a subset of FPGA targets.

The LabVIEW 2018 FPGA Module includes the following new features:

- The LabVIEW 2018 FPGA Module adds support for LabVIEW 2018 (64-bit). The LabVIEW 2018 FPGA Module (64-bit) is available in English only.
- In the LabVIEW 2018 FPGA Module, you can access a library of floating-point math operation functions via the NI Floating-Point Library link in the FPGA Math & Analysis palette. Use these functions in your FPGA application to minimize resource usage outside single-cycle Timed Loops or to optimize timing performance inside 40 MHz single-cycle Timed Loops.

Bug Fixes

The following items are the IDs and titles of a subset of issues fixed in the FPGA Module.

677354 When a Case structure wired into an auto-indexing tunnel has more than 32 cases, the output array could be all zeroes
677246 Using the IP Integration Node with a VHDL file that contains extended identifiers results in compilation failure with the following error: [Synth 8-2139] illegal identifiers
674053 Using a VHDL file with an IP Integration Node that contains a generic and ends the entity declaration with "end entity" rather than "end <entity name>" results in syntax check failure
673789 If you fix errors about the Desktop Execution Node (DEN) in an FPGA VI and then run the FPGA VI in simulation mode without the DEN, the FPGA VI still throws errors about the DEN
671439 Using the Desktop Execution Node with an FPGA VI that is within a project library file (.lvlib) on an FPGA target results in Error 1055
658853 CLIP configuration may not display all entities if one of the port names contains "begin"
656074 If you use the FPGA FIFO Read method with the Desktop Execution Node, the FPGA FIFO Read method uses the Timeout input as milliseconds instead of ticks
640863 DMA channels are not available in the LabVIEW FPGA host interface if a DMA channel of the DBL type is present
629712 A crash can occur when you add an FPGA handshake into a cluster

About NI LabVIEW FPGA Module. With the LabVIEW FPGA Module and LabVIEW, you can create VIs that run on NI FPGA targets, such as Reconfigurable I/O (RIO) devices. FPGA targets contain a reconfigurable FPGA (Field-Programmable Gate Array) surrounded by fixed I/O resources. Depending on the specific FPGA target, fixed I/O resources can include analog and digital resources, such as analog-to-digital converters (ADCs) and digital-to-analog converters (DACs), that you can control from the FPGA.

With the FPGA Module, you configure the behavior of the reconfigurable FPGA to match the requirements of a specific measurement and control system. The VI you create to run on an FPGA target is called the FPGA VI. Use the FPGA Module to write FPGA VIs. When you download the FPGA VI to the FPGA, you are programming the functionality of the FPGA target. Each new FPGA VI you create and download is a custom timing, triggering, and I/O solution.

You can use FPGA IP Builder to efficiently implement your LabVIEW algorithms for FPGA targets and to generate FPGA code that meets specific performance requirements. FPGA IP Builder does not require that you place LabVIEW FPGA code inside a single-cycle Timed Loop.

About NI LabVIEW FPGA Compile Farm Toolkit. The NI LabVIEW FPGA Compile Farm Toolkit, a LabVIEW FPGA Module add-on, helps you create an on-site server to manage FPGA compilations easily. You can connect as many worker computers as you need, and the central server software manages the farming out of parallel compilations and queuing. To reduce your FPGA compile times, the toolkit also includes support for Linux compile worker computers.

About NI LabView. LabVIEW (Laboratory Virtual Instrument Engineering Workbench) is a graphical programming language that uses icons instead of lines of text to create applications. In contrast to text-based programming languages that use instructions to determine the order of program execution, LabVIEW uses dataflow programming. In data flow programming, the flow of data through the nodes on the block diagram determines the execution order of the VIs and functions. VIs, or virtual instruments, are LabVIEW programs that imitate physical instruments.

In LabVIEW, you build a user interface by using a set of tools and objects. The user interface is known as the front panel. After you build the front panel, you add code using graphical representations of functions to control the front panel objects. You add this graphical code, also known as G code or block diagram code, to the block diagram. The block diagram somewhat resembles a flowchart. The block diagram, front panel, and graphical representations of code compose a VI.

The FPGA Module (64-bit) provides access to more memory than the FPGA Module (32-bit) can provide. The FPGA Module (64-bit) is available in English only.

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