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NI VeriStand 2023 Q1

cadcamaec@protonmail.com2023-07-27EDA.PCB.CAM79
VeriStand2023Q1isconfiguration-basedtestingsoftware,allowingyoutodevelop,prototype,andt

VeriStand 2023 Q1 is configuration-based testing software, allowing you to develop, prototype, and test control systems using hardware I/O and your simulation models.

VeriStand 2023 Q1 New Features - Date: January 2023

LabVIEW 2023 Q1 Support
VeriStand is compatible with LabVIEW 2023 Q1 64-bit. All custom devices, LabVIEW models, and LabVIEW applications that contain the VeriStand API require this LabVIEW version. The VeriStand API will not install in previous versions of LabVIEW. LabVIEW 2023 Q1 64-bit supports CompactRIO controllers and NI R Series modules. Custom devices and LabVIEW FPGA development can use LabVIEW 64-bit.
Note: The HDL Coder Support Package for NI FPGA Hardware and IP to FPGA Conversion Utility only support LabVIEW 32-bit.
External Mode with XCP Communication
Enable external mode with XCP communication when building a MathWorks Simulink model to monitor signals and tune parameters from the Simulink environment. XCP provides additional capabilities such as viewing signals within referenced models. For more information, refer to the VeriStand Model Generation Support documentation on GitHub.
Terminal Specification for DAQmx Counter Operations
Use System Explorer or the System Definition .NET API to specify the following terminals for DAQmx counter tasks.
- Terminal for counter I/O tasks.
- A/B/Z terminal for position measurement tasks.
Specifying these terminals allows modules to use all counters through non-default PFI lines. For more information, refer to documentation for your module.
HDL Coder Support for PXIe R-series Kintex-7 and Simscape Models
HDL Coder Support Package for NI FPGA Hardware supports the following:
- PXIe R-series Kintex-7 modules - Use the support package to remain within HDL Coder while generating a bitfile from a Simulink model for compatible NI FPGA hardware.
- Simscape models.

VeriStand 2023 Q1 Bugs Fixes

1921895 Viewing complex Screens causes poor VeriStand undeploy performance
Viewing a deployed project screen containing 80+ UI elements may cause the project to take several minutes when executing the undeploy command.
Workaround: Add an empty Screen to the project. Make the empty Screen the active document before undeploying.
2170274 Dragging multiple individual channels onto a screen hangs VeriStand
Dragging multiple individual channels onto a VeriStand screen can lead to a temporary hang.
Workaround: There is currently no known workaround for this issue.

VeriStand helps you get your hardware-in-the-loop or test cell control and monitoring system up and running faster. VeriStand provides integrated support for a range of NI-XNET devices, NI-DAQ devices, and NI FPGA targets. It also supports deploying to a range of targets, including PXI/PCI controllers, CompactRIO/Single-Board RIO, and desktop PCs. With a wide range of out-of-the-box functionality that includes configurable data acquisition and logging, test sequencing, and the integration of Simulink models, VeriStand reduces the time needed to test your products. You can also use a variety of software tools to add custom functionality to VeriStand, which makes it flexible enough to adapt to even the most complex applications. Choosing VeriStand gives you the confidence that your test system will perform reliably while providing the flexibility you need to meet your real-time test requirements. VeriStand provides a compiler toolchain plugin for Simulink Coder to generate shared libraries from Simulink models that VeriStand can run as part of an integrated hardware-in-the-loop test system on an NI real-time OS. Users can import the generated shared libraries into a VeriStand project and map the model inputs and outputs to CAN signals and analog I/O.

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